July 5, 2016

Zuken's latest version of E3.series—complete solution for electrical and fluid design—offers engineers a live-feel, collaborative environment, along with a range of individual and multi-user usability and productivity features, such as dynamic block functionality and a tabular terminal editor.

The E3.series 2016 has been enhanced to offer a smoother user experience for today’s globally dispersed design teams. Users can work simultaneously on one sheet and instantly see in the sheet tree if another user has opened it, as their user name is visible. And with the latest collaboration technology, including Oracle updates, all objects can now be accessed online. Unique to E3.series, hierarchy is available within a block and offers numerous productivity benefits. Dynamic blocks can be...

June 28, 2016

PCBCart, a China-based custom PCB manufacturing, assembly and parts sourcing service provider, recently brought down its PCB prototyping price as a support for independent and small electronics fabricating groups.

The choice to lower prototype prices was to encourage more people to step into electronics fabrication and to benefit existing electronics DIYers with proto boards currently...

June 23, 2016

In-Circuit Design Pty Ltd (ICD), Australia, developer of the ICD Stackup and PDN Planner software, has released a Matched Delay Optimization feature for the Stackup Planner. 

Signals propagate at the speed-of-light in free space. However, this speed varies dramatically depending on the surrounding dielectric materials. Each layer, of a multilayer PCB, can have a very different propagation speed. This is particularly important for the latest high-speed DDR3/4 memory devices. The new “Matched Delay Optimization” feature, of the ICD Stackup Planner, allows you to not only match the length of busses, but takes this one step further by automatically calculating the appropriate length required to match the delay exactly. The integrated field solver simulates the flight time, of each...

June 22, 2016

IPC Standards Committee Reports, Part 4 — Packaged Electronic Components, Rigid Printed Boards, Embedded Devices, Printed Electronics, IP

These standards committee reports from IPC APEX EXPO 2016 have been compiled to help keep you up to date on IPC standards committee activities. This is the fourth and final in the series of reports.

Packaged Electronic Components

The B-11 3-D Electronic Packages Subcommittee is making significant progress on the work draft of IPC-7091, Design and Assembly Process Implementation of 3-D Components, which will describe design and...

June 2, 2016

These standards committee reports from IPC APEX EXPO 2016 have been compiled to help keep you up to date on IPC standards committee activities. This is the first in a series of reports.

Printed Board Design

The 1-10c Test Coupon and Artwork Generation Task Group announced the release of the IPC-2221B Gerber Coupon Generator. The Generator allows for the creation of Gerber files for AB/R and D test coupon designs found in Appendix A of IPC-2221BGeneric Standard on Printed Board Design, for plated hole integrity and registration evaluations.

The 1-13 Land Pattern Subcommittee met to discuss updates to the IPC-7351C Land and Pad Pattern (Surface mount & through hole) Development Issues and...

June 1, 2016

Douglas G. Brooks, PhD and Dr. Johannes Adam, CID have teamed up to write PCB Trace and Via Currents and Temperatures: The Complete Analysis. Brooks has been looking at trace current and temperature relationships since the mid-1990s. Now, he and Adam, of the consulting group Adam Research, have assembled decades of knowledge into these pages.

Starting with a historical background, this book covers: (a) PCB materials (copper and dielectrics) and the role they play in the heating and cooling of traces; (b) The IPC curves found in IPC 2152; (c) Equations that fit those curves; (d) Computer simulations that fit those curves and equations; (e) Sensitivity analyses showing what happens when we vary the environment (adjacent traces and planes, changing trace lengths, thermal...

May 27, 2016

EMA Design Automation, a full-service provider of Electronic Design Automation (EDA) solutions, has launched a ‘Can You Spot the Difference’ Contest for Electrical Engineers.The contest highlights the design compare function added in the new OrCAD 17.2 2016 release which helps users quickly identify what changes are made between PCB design revisions.

“We are excited about the release of the new capabilities for OrCAD. This new graphical compare function is a powerful tool addressing the specialized needs of our users,” said Manny Marcano, President of EMA Design Automation. “Engineers can quickly and easily identify both graphical and electrical differences between two schematics on a page-by-page basis.”

The contest begins on Tuesday, May 24, 2016 and will continue until...

May 20, 2016

Together with leading software development company Novarm, Ucamco is delighted to announce the stable release of DipTrace 3.0, the latest generation of Novarm's intuitive, powerful and affordable PCB layout solution for the world's electronic engineers. DipTrace 3.0 is the result of Novarm's understanding of how EDA software is used in the field, its active involvement in the electronic designers' community, and the fact that it listens carefully to its customers. Novarm has responded to its marketplace with a raft of new developments that significantly improve its software's overall performance, ease of use and reliability. This includes fully implementing Gerber X2 for more robust design data transfer, as Novarm's CEO and Senior Software Developer Stanislav Ruev comments: “Gerber X2...

April 27, 2016

AUSTIN, Texas--(BUSINESS WIRE)--Mentor Graphics, a leader in electronic design automation (EDA) uses Projectplace (http://www.projectplace.com/) by Planview to significantly improve project collaboration, task management and organization with teams around the globe. During a one-hour webcast on Wednesday, April 27, Brian Tharp, IT PMO manager at Mentor Graphics, and Jason Morio,...

April 25, 2016

Altium LLC, a Global Leader in Electronic Design Automation, and CST®, Developer of the Market’s Widest Range of 3D Electromagnetic Field Simulation Tools, Have Announced the Release of a New PDN Analysis Extension for Altium Designer.

San Diego, CA (PRWEB) - Altium LLC and CST® have announced the release of a new Power Distribution Network (PDN) analysis extension for Altium Designer®, the flagship PCB design tool from Altium. PDN Analyzer powered by CST® allows PCB designers to easily resolve PDN issues as they arise during a board layout process without requiring physical prototypes or dedicated simulation expertise. The PDN Analyzer provides a complete PDN analysis workflow including voltage and current visualizations in Native 3D, integrated power distribution...

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